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AS Index: P -- R

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Index Entry Section

P
p2align directive7.86 .p2align[wl] abs-expr, abs-expr, abs-expr
p2alignl directive7.86 .p2align[wl] abs-expr, abs-expr, abs-expr
p2alignw directive7.86 .p2align[wl] abs-expr, abs-expr, abs-expr
padding the location counter7.3 .align abs-expr, abs-expr, abs-expr
padding the location counter given a power of two7.86 .p2align[wl] abs-expr, abs-expr, abs-expr
padding the location counter given number of bytes7.7 .balign[wl] abs-expr, abs-expr, abs-expr
page, in listings7.38 .eject
paper size, for listings7.91 .psize lines , columns
paths for .include2.5 .include Search Path: `-I' path
patterns, writing in memory7.54 .fill repeat , size , value
PDP-11 comments9.29.3 PDP-11 Assembly Language Syntax
PDP-11 floating-point register syntax9.29.3 PDP-11 Assembly Language Syntax
PDP-11 general-purpose register syntax9.29.3 PDP-11 Assembly Language Syntax
PDP-11 instruction naming9.29.4 Instruction Naming
PDP-11 line separator9.29.3 PDP-11 Assembly Language Syntax
PDP-11 support9.29 PDP-11 Dependent Features
PDP-11 syntax9.29.3 PDP-11 Assembly Language Syntax
PIC code generation for ARM9.3.1 Options
PIC code generation for M32R9.21.1 M32R Options
PIC selection, MIPS9.25.1 Assembler options
PJ endianness1. Overview
PJ line comment character9.30.2.1 Special Characters
PJ line separator9.30.2.1 Special Characters
PJ options9.30.1 Options
PJ support9.30 picoJava Dependent Features
plus, permitted arguments6.2.4 Infix Operators
popsection directive7.87 .popsection
Position-independent code, CRIS9.7.1 Command-line Options
Position-independent code, symbols in, CRIS9.7.4.2 Symbols in position-independent code
PowerPC architectures9.31.1 Options
PowerPC directives9.31.2 PowerPC Assembler Directives
PowerPC line comment character9.31.3.1 Special Characters
PowerPC line separator9.31.3.1 Special Characters
PowerPC options9.31.1 Options
PowerPC support9.31 PowerPC Dependent Features
precedence of operators6.2.4 Infix Operators
precision, floating point3.6.2.3 Flonums
prefix operators6.2.3 Prefix Operator
prefixes, i3869.14.7 Instruction Prefixes
preprocessing3.1 Preprocessing
preprocessing, turning on and off3.1 Preprocessing
previous directive7.88 .previous
primary attributes, COFF symbols5.5.4.1 Primary Attributes
print directive7.89 .print string
proc directive, SPARC9.38.5 Sparc Machine Directives
profiler directive, MSP 4309.27.4 MSP 430 Machine Directives
profiling capability for MSP 4309.27.6 Profiling Capability
protected directive7.90 .protected names
pseudo-op .arch, CRIS9.7.4.4 Assembler Directives
pseudo-op .dword, CRIS9.7.4.4 Assembler Directives
pseudo-op .syntax, CRIS9.7.4.4 Assembler Directives
pseudo-op BSPEC, MMIX9.26.3.4 Assembler Directives
pseudo-op BYTE, MMIX9.26.3.4 Assembler Directives
pseudo-op ESPEC, MMIX9.26.3.4 Assembler Directives
pseudo-op GREG, MMIX9.26.3.4 Assembler Directives
pseudo-op IS, MMIX9.26.3.4 Assembler Directives
pseudo-op LOC, MMIX9.26.3.4 Assembler Directives
pseudo-op LOCAL, MMIX9.26.3.4 Assembler Directives
pseudo-op OCTA, MMIX9.26.3.4 Assembler Directives
pseudo-op PREFIX, MMIX9.26.3.4 Assembler Directives
pseudo-op TETRA, MMIX9.26.3.4 Assembler Directives
pseudo-op WYDE, MMIX9.26.3.4 Assembler Directives
pseudo-opcodes for XStormy169.47.3 XStormy16 Pseudo-Opcodes
pseudo-opcodes, M680x09.22.6.1 Branch Improvement
pseudo-opcodes, M68HC119.23.6.1 Branch Improvement
pseudo-ops for branch, VAX9.45.5 VAX Branch Improvement
pseudo-ops, CRIS9.7.4.4 Assembler Directives
pseudo-ops, machine independent7. Assembler Directives
pseudo-ops, MMIX9.26.3.4 Assembler Directives
psize directive7.91 .psize lines , columns
PSR bits9.17.2.3 IA-64 Processor-Status-Register (PSR) Bit Names
pstring directive, TIC54X9.39.9 Directives
psw register, V8509.46.2.2 Register Names
purgem directive7.92 .purgem name
purpose of GNU assembler1.2 The GNU Assembler
pushsection directive7.93 .pushsection name [, subsection] [, "flags"[, @type[,arguments]]]

Q
quad directive7.94 .quad bignums
quad directive, i3869.14.10 Floating Point
quad directive, x86-649.14.10 Floating Point

R
real-mode code, i3869.14.15 Writing 16-bit Code
ref directive, TIC54X9.39.9 Directives
register directive, SPARC9.38.5 Sparc Machine Directives
register names, Alpha9.1.3.2 Register Names
register names, ARC9.2.2.2 Register Names
register names, ARM9.3.2.3 Register Names
register names, AVR9.4.2.2 Register Names
register names, CRIS9.7.4.3 Register names
register names, H8/3009.11.2.2 Register Names
register names, IA-649.17.2.2 Register Names
register names, LM329.19.2.1 Register Names
register names, MMIX9.26.3.3 Register names
register names, MSP 4309.27.2.3 Register Names
register names, Sparc9.38.3.2 Register Names
register names, TILE-Gx9.41.2.2 Register Names
register names, TILEPro9.42.2.2 Register Names
register names, V8509.46.2.2 Register Names
register names, VAX9.45.6 VAX Operands
register names, Xtensa9.48.2.2 Register Names
register names, Z809.43.2.2 Register Names
register naming, s3909.34.3.1 Register naming
register operands, i3869.14.3.1 AT&T Syntax versus Intel Syntax
register operands, x86-649.14.3.1 AT&T Syntax versus Intel Syntax
registers, D10V9.8.2.4 Register Names
registers, D30V9.9.2.5 Register Names
registers, i3869.14.6 Register Naming
registers, SH9.36.2.2 Register Names
registers, SH649.37.2.2 Register Names
registers, TIC54X memory-mapped9.39.11 Memory-mapped Registers
registers, x86-649.14.6 Register Naming
registers, Z80009.44.2.2 Register Names
relaxation9.48.4 Xtensa Relaxation
relaxation of ADDI instructions9.48.4.3 Other Immediate Field Relaxation
relaxation of branch instructions9.48.4.1 Conditional Branch Relaxation
relaxation of call instructions9.48.4.2 Function Call Relaxation
relaxation of immediate fields9.48.4.3 Other Immediate Field Relaxation
relaxation of L16SI instructions9.48.4.3 Other Immediate Field Relaxation
relaxation of L16UI instructions9.48.4.3 Other Immediate Field Relaxation
relaxation of L32I instructions9.48.4.3 Other Immediate Field Relaxation
relaxation of L8UI instructions9.48.4.3 Other Immediate Field Relaxation
relaxation of MOVI instructions9.48.4.3 Other Immediate Field Relaxation
reloc directive7.95 .reloc offset, reloc_name[, expression]
relocation4. Sections and Relocation
relocation example4.2 Linker Sections
relocations, Alpha9.1.3.3 Relocations
relocations, Sparc9.38.3.4 Relocations
repeat prefixes, i3869.14.7 Instruction Prefixes
reporting bugs in assembler10. Reporting Bugs
rept directive7.96 .rept count
reserve directive, SPARC9.38.5 Sparc Machine Directives
return instructions, i3869.14.3.1 AT&T Syntax versus Intel Syntax
return instructions, x86-649.14.3.1 AT&T Syntax versus Intel Syntax
REX prefixes, i3869.14.7 Instruction Prefixes
RL78 assembler directives9.32.3 Assembler Directives
RL78 line comment character9.32.4.1 Special Characters
RL78 line separator9.32.4.1 Special Characters
RL78 modifiers9.32.2 Symbolic Operand Modifiers
RL78 options9.32.1 RL78 Options
RL78 support9.32 RL78 Dependent Features
rsect9.44.3 Assembler Directives for the Z8000
RX assembler directive .3byte9.33.3 Assembler Directives
RX assembler directive .fetchalign9.33.3 Assembler Directives
RX assembler directives9.33.3 Assembler Directives
RX floating point9.33.4 Floating Point
RX line comment character9.33.5.1 Special Characters
RX line separator9.33.5.1 Special Characters
RX modifiers9.33.2 Symbolic Operand Modifiers
RX options9.33.1 RX Options
RX support9.33 RX Dependent Features

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